For anyone interested in the XILINX XC-2064 LOGIC CELL ARRAY read 
on.

This is a 1000-1500 gate Gate Array that is configured by 
downloading a bit stream to it from rom at power up time. The 
configuration 'links' are maintained in CMOS static ram cells in 
the IC.
I have a spare copy of the data sheet plus some other information 
obtained at the XILINX - HAMILTON/AVNET Seminar.

Some general information :
. 12000 bits are required for configuration
  using a 1Mhz clock requires 12 milliseconds to load.
. There are 122 flop flops per IC distributed in 58 I/O blocks and 
  64 combinational blocks.
. Package size is 68 pin PLCC, 48 pin (40 i/o pins) DIP package
  available soon. 
. Development software runs on IBM PC XT/AT or compatible, with 
  hard disk.
. Full speed in circuit emulator is available.
  (you can set a hardware breakpoint with this device)

PRICING AND AVAILABILITY.
Development software:
Evaluation Kit						  $  250.00
XACT Development system software, including Macro library $3,600.00
SILOS Timing/simulation package				  $3,500.00
XACTOR in circuit emulator with one pod 		  $3,000.00
 (can accomodate 4 pods for simulation of 4 devices at once)
XACTOR pods						  $  850.00
XACT training/demo package				  $  350.00

Piece parts :
Speed	package	       1-24    25-99  100-999   5K+ (end '86)
-1   68 lead plcc	$60	$53	$47	$20
-2   68 lead plcc	$80	$72	$63	$28

-1 (20Mhz) available now, -2 (33Mhz) available end 2nd quarter.
48 pin package "soon"