Timing specs for power on reset.
See Johns mail message below for a statemant of the problem.

The Power-on circuit (100kohm/.1uF/2N3506) is not designed to reset the 
microprocessor. It is designed to reset the watchdog counter that resets
the  microprocessor. The RC circuit has a time constant of 10mSeconds 
(which means about 3 mS to a valid logic level). I checked this on the 
wonderful new toy and it is so. POWER-ON comes up about 3mS after the 
5 volts stabilizes. The counter is then cleared and holds the 
microprocessor reset line for 7 video frame intervals, about 116 mS. 
before releasing the Microprocessor on its merry way. The data book 
specifies that a 68000 must have 100mS after stable 5volts before reset 
can be released.
But if you disable watchdog, the counter is disabled, and the 
microprocessor reset line is released on the first VBLANK after POWER-ON 
goes true, i.e. somewhere between 3 and 19mS after the 5 volts stabilizes. 
With this the 68000 is not happy.
So if you want a board to power up happy, either do not disable watchdog, 
or design a more elaborate watchdog circuit. Of course an easy fix would 
be to beef up the capacitor for field test games that want the watchdog 
disabled.
							Pat.