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Date: December 16, 1988 17:20
From: KIM::MARGOLIN
To: STUN,MARGOLIN
Driver GSP Memory Map ------------------------- TFR 0000 0000 to 000F FFFF (64K Words) Shift Register Transfers POLY 0200 0000 to 020F FFFF (64K Words) Fast Polygon Fills CWR0 F400 0000 Write to Pixel Register (Used by Fast Polygon Fills) CWR1 F480 0000 Control Bits latch on Address Writes (No Data) F480 0000 /TFR_SE = 1 F480 0010 SCROLL = 0 F480 0020 PS0 = 0 F480 0030 PS1 = 0 F480 0040 F480 0050 F480 0060 F480 0070 LED = on --------- F480 0080 /TFR_SE = 0 F480 0090 SCROLL = 1 F480 00A0 PS0 = 1 F480 00B0 PS1 = 1 F480 00C0 F480 00D0 F480 00E0 F480 00F0 LED = off CWR2, CRD2 F500 0000 R/W Color Table: Red (D8-D15) and Green (D0-D7) CWR3, CRD3 F580 0000 R/W Color Table: Blue (DD0-D7) PMEM FF80 0000 to FFFF FFFF (512K Words) Normal Memory Accesses Note: TFR, POLY, and PMEM are the SAME physical Memory. They just see it organized from different perspectives. ====================================================================== Graphics Addresses -------------------------- PMEM $FF80 0000 + $1000 * Line# [Full Turbo] MultiSync is probably double mapped, starting at $0FF80 0000 .
Dec 16, 1988